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Abhishek Patyal

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2018–2020

Best venue rank

A*

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2020DACLate Breaking Results: Pole-aware Analog Placement Considering Monotonic Current Flow and Crossing-Wire Minimization.Abhishek Patyal, Hung-Ming Chen, Mark Po-Hung Lin
2020ICCADAchieving Analog Layout Integrity through Learning and Migration Invited Talk.Mark Po-Hung Lin, Hao-Yu Chi, Abhishek Patyal, Zheng-Yao Liu, Jun-Jie Zhao, Chien-Nan Jimmy Liu, Hung-Ming Chen
2018DACAnalog placement with current flow and symmetry constraints using PCP-SP.Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu