| 2021 | DAC | SPROUT - Smart Power ROUting Tool for Board-Level Exploration and Prototyping. | Rassul Bairamkulov, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas, Eby G. Friedman |
| 2020 | ISCAS | Graph-Based Power Network Routing for Board-Level High Performance Systems. | Rassul Bairamkulov, Eby G. Friedman, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas |
| 2019 | ASPDAC | Learning-based prediction of package power delivery network quality. | Yi Cao, Andrew B. Kahng, Joseph Li, Abinash Roy, Vaishnav Srinivas, Bangqi Xu |
| 2008 | ISCAS | Analysis of the impacts of signal rise/fall time and skew variations in coupled-RLC interconnects. | Abinash Roy, Masud H. Chowdhury |
| 2008 | ISCAS | Optimization technique for flip-flop inserted global interconnect. | Jingye Xu, Abinash Roy, Masud H. Chowdhury |
| 2007 | DAC | Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew. | Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury |
| 2007 | DATE | Interactive presentation: Analysis of power consumption and BER of flip-flop based interconnect pipelining. | Jingye Xu, Abinash Roy, Masud H. Chowdhury |
| 2007 | ISCAS | Global Interconnect Optimization in the Presence of On-chip Inductance. | Abinash Roy, Masud H. Chowdhury |
| 2007 | ISCAS | Delay and Clock Skew Variation due to Coupling Capacitance and Inductance. | Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury |
| 2007 | ISCAS | Power Consumption Analysis of Flip-flop Based Interconnect Pipelining. | Jingye Xu, Abinash Roy, Masud H. Chowdhury |