Akio Hirata
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
1998–1998
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | ICCAD | Proposal of a timing model for CMOS logic gates driving a CRC load. | Akio Hirata, Hidetoshi Onodera, Keikichi Tamaru |