Akira Mochizuki
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2014–2016
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ISCAS | Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design. | Masanori Natsui, Akira Tamakoshi, Akira Mochizuki, Hiroki Koike, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu |
| 2015 | DATE | Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm. | Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Shoun Matsunaga, Masanori Natsui, Akira Mochizuki |
| 2015 | IECON | Design of a computational nonvolatile RAM for a greedy energy-efficient VLSI processor. | Akira Mochizuki, Naoto Yube, Takahiro Hanyu |
| 2014 | ISCAS | Energy-aware current-mode inter-chip link for a dependable GALS NoC platform. | Hirokatsu Shirahama, Akira Mochizuki, Yuma Watanabe, Takahiro Hanyu |