Alexander Viehl
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
37
Venues
11
Active years
2006–2024
Best venue rank
A*
Where they publish
Papers
37 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | DATE | DIAPASON: Differentiable Allocation, Partitioning and Fusion of Neural Networks for Distributed Inference. | Federico Nicols Peccia, Alexander Viehl, Oliver Bringmann |
| 2024 | INDIN | Ontology-Supported AI Model and Dataset Management. | Jan Novacek, Ali Ahari, Tobias Mller, Sebastian Reiter, Alexander Viehl, Oliver Bringmann |
| 2022 | MODELSWARD | Universal Safety Format: Automated Safety Software Generation. | Frederik Haxel, Alexander Viehl, Michael Benkel, Bjoern Beyreuther, Klaus Birken, Rolf Schmedes, Kim Grttner, Daniel Mueller-Gritschneder |
| 2021 | INDIN | Platform Generation for Edge AI Devices with Custom Hardware Accelerators. | Leon Hielscher, Alexander Bloeck, Alexander Viehl, Sebastian Reiter, Marc Staiger, Oliver Bringmann |
| 2020 | ASPDAC | JIT-Based Context-Sensitive Timing Simulation for Efficient Platform Exploration. | Alessandro Cornaglia, Md. Shakib Hasan, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2019 | ASPDAC | SIMULTime: Context-sensitive timing simulation on intermediate code representation for rapid platform explorations. | Alessandro Cornaglia, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2019 | INDIN | Demonstration of a Toolchain for Feature Extraction, Analysis and Visualization on an Industrial Case Study. | Sten Grner, Andreas Burger, Hadil Abukwaik, Sascha El-Sharkawy, Klaus Schmid, Tewfik Ziadi, Anton Paule, Felix Suda, Alexander Viehl |
| 2018 | DSD | Attack Surface Modeling and Assessment for Penetration Testing of IoT System Designs. | Yasamin Mahmoodi, Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2018 | MODELSWARD | Model-guided Security Analysis of Interconnected Embedded Systems. | Yasamin Mahmoodi, Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2017 | DATE | Context-sensitive timing automata for fast source level simulation. | Sebastian Ottlik, Christoph Gerum, Alexander Viehl, Wolfgang Rosenstiel, Oliver Bringmann |
| 2017 | ICSA | Digital Space Systems Engineering through Semantic Data Models. | Tobias Hoppe, Harald Eisenmann, Alexander Viehl, Oliver Bringmann |
| 2017 | MODELSWARD | SEMF - The Semantic Engineering Modeling Framework - Bringing Semantics into the Eclipse Modeling Framework for Space Systems Engineering. | Tobias Hoppe, Harald Eisenmann, Alexander Viehl, Oliver Bringmann |
| 2016 | ASPDAC | Trace-based context-sensitive timing simulation considering execution path variations. | Sebastian Ottlik, Jan Micha Borrmann, Sadik Asbach, Alexander Viehl, Wolfgang Rosenstiel, Oliver Bringmann |
| 2016 | DATE | Combining graph-based guidance with error effect simulation for efficient safety analysis. | Jo Laufenberg, Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Thomas Kropf, Wolfgang Rosenstiel |
| 2016 | DSD | Adaptive Control of the Heating System for Optimized Energy Consumption in Electric Vehicles. | Rhea Valentina, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2016 | MODELSWARD | A Methodology for Deriving Conceptual Data Models from Systems Engineering Artefacts. | Christian Hennig, Harald Eisenmann, Alexander Viehl, Oliver Bringmann |
| 2016 | MODELSWARD | SCDML: A Language for Conceptual Data Modeling in Model-based Systems Engineering. | Christian Hennig, Tobias Hoppe, Harald Eisenmann, Alexander Viehl, Oliver Bringmann |
| 2015 | DSD | White-Box Error Effect Simulation for Assisted Safety Analysis. | Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2015 | MODELSWARD | On Languages for Conceptual Data Modeling in Multi-disciplinary Space Systems Engineering. | Christian Hennig, Harald Eisenmann, Alexander Viehl, Oliver Bringmann |
| 2014 | ASPDAC | Constraint-based platform variants specification for early system verification. | Andreas Burger, Alexander Viehl, Andreas Braun, Finn Haedicke, Daniel Groe, Oliver Bringmann, Wolfgang Rosenstiel |
| 2014 | CASES | Context-sensitive timing simulation of binary embedded software. | Sebastian Ottlik, Stefan Stattelmann, Alexander Viehl, Wolfgang Rosenstiel, Oliver Bringmann |
| 2014 | DAC | Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. | Jan-Hendrik Oetjens, Nico Bannow, Markus Becker, Oliver Bringmann, Andreas Burger, Moomen Chaari, Samarjit Chakraborty, Rolf Drechsler, Wolfgang Ecker, Kim Grttner, Thomas Kruse, Christoph Kuznik, Hoang Minh Le, Andreas Mauderer, Wolfgang Mller, Daniel Mller-Gritschneder, Frank Poppen, Hendrik Post, Sebastian Reiter, Wolfgang Rosenstiel, S. Roth, Ulf Schlichtmann, Andreas von Schwerin, Bogdan-Andrei Tabacaru, Alexander Viehl |
| 2014 | DATE | Mission profile aware robustness assessment of automotive power devices. | Thomas Nirmaier, Andreas Burger, Manuel Harrant, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel, Georg Pelz |
| 2014 | GI | Sicherstellen semantischer Integritt im Big Data Umfeld - Problemstellung und Lsungsansatz. | Tobias Hoppe, Harald Eisenmann, Alexander Viehl, Oliver Bringmann, Christian Hennig |
| 2014 | IECON | Battery aging estimation for eco-driving strategy and electric vehicles sustainability. | Rhea Valentina, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2013 | ASPDAC | Reliability assessment of safety-relevant automotive systems in a model-based design flow. | Sebastian Reiter, Michael Pressler, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2013 | DATE | Shared memory aware MPSoC software deployment. | Timo Schnwald, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2013 | FDL | Advanced features for industry-level logging and tracing of C-based designs. | Wei Hong, Jyoti Joshi, Alexander Viehl, Nico Bannow, Angela Kramer, Hendrik Post, Oliver Bringmann, Wolfgang Rosenstiel |
| 2012 | DSD | Distance-Constrained Force-Directed Process Mapping for MPSoC Architectures. | Timo Schnwald, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2010 | DATE | Towards assertion-based verification of heterogeneous system designs. | Stefan Lmmermann, Jrgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Alexander Viehl, Alexander Jesser, Lars Hedrich |
| 2010 | FDL | Reconstructing Line References from Optimized Binary Code for Source-Level Annotation. | Stefan Stattelmann, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2009 | DATE | White box performance analysis considering static non-preemptive software scheduling. | Alexander Viehl, Michael Pressler, Oliver Bringmann, Wolfgang Rosenstiel |
| 2008 | DAC | High-performance timing simulation of embedded software. | Jrgen Schnerr, Oliver Bringmann, Alexander Viehl, Wolfgang Rosenstiel |
| 2008 | FDL | Integrated Requirement Evaluation of Non-Functional System-on-Chip Properties. | Alexander Viehl, Bjrn Sander, Oliver Bringmann, Wolfgang Rosenstiel |
| 2008 | FDL | Analysis of Non-functional Properties of MPSoC Designs. | Alexander Viehl, Bjrn Sander, Oliver Bringmann, Wolfgang Rosenstiel |
| 2007 | ASPDAC | Control-Flow Aware Communication and Conflict Analysis of Parallel Processes. | Axel Siebenborn, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel |
| 2006 | DATE | Formal performance analysis and simulation of UML/SysML models for ESL design. | Alexander Viehl, Timo Schnwald, Oliver Bringmann, Wolfgang Rosenstiel |