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Alexandre Guerre

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

7

Active years

2009–2021

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2021SIGCOMMBlockgraph proof-of-concept.David Cordova Morales, Pedro B. Velloso, Alexandre Guerre, Thi Mai Trang Nguyen, Guy Pujolle, Khaldoun Al Agha, Guillaume Dua
2016PDPSpecific Read-Only Data Management for Memory System Optimization.Gregory Vaumourin, Alexandre Guerre, Thomas Dombek, Denis Barthou
2015ISLPEDA simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures.Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Julien Mottin, Pascal Vivet, Hela Boussetta, Nicolas Peltier
2014DATEA unified methodology for a fast benchmarking of parallel architecture.Alexandre Guerre, Jean-Thomas Acquaviva, Yves Lhuillier
2014DATEEarly design stage thermal evaluation and mitigation: The locomotiv architectural case.Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Alexandre Aminot, Pascal Vivet, Hela Boussetta, Luca Ferro, Nicolas Peltier
2014EUCParallel Architecture Benchmarking: From Embedded Computing to HPC, a FiPS Project Perspective.Yves Lhuillier, Jean-Marc Philippe, Alexandre Guerre, Michal Kierzynka, Ariel Oleksiak
2013DATEARTM: a lightweight fork-join framework for many-core embedded systems.Maroun Ojail, Raphal David, Yves Lhuillier, Alexandre Guerre
2013ICCSPACHA: Low Cost Bare Metal Development for Shared Memory Manycore Accelerators.Alexandre Aminot, Alexandre Guerre, Julien Peeters, Yves Lhuillier
2009DSDApproximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study.Alexandre Guerre, Nicolas Ventroux, Raphal David, Alain Mrigot