| 2021 | GLOBECOM | Fronthaul-Aware Scheduling Strategies for Next Generation RANs. | Sandra Lagn, Xavier Gelabert, Lorenza Giupponi, Andreas Hansson |
| 2016 | ISPASS | Elastic traces for fast and accurate system performance exploration. | Radhika Jagtap, Stephan Diestelhorst, Andreas Hansson |
| 2015 | ISLPED | Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones. | Anup Das, Matthew J. Walker, Andreas Hansson, Bashir M. Al-Hashimi, Geoff V. Merrett |
| 2015 | ISPASS | A full-system approach to analyze the impact of next-generation mobile flash storage. | Ren de Jong, Andreas Hansson |
| 2014 | ISPASS | Simulating DRAM controllers for future system architecture exploration. | Andreas Hansson, Neha Agarwal, Aasheesh Kolli, Thomas F. Wenisch, Aniruddha N. Udipi |
| 2013 | MASCOTS | Introducing DVFS-Management in a Full-System Simulator. | Vasileios Spiliopoulos, Akash Bagdia, Andreas Hansson, Peter Aldworth, Stefanos Kaxiras |
| 2010 | DAC | The aethereal network on chip after ten years: goals, evolution, lessons, and future. | Kees Goossens, Andreas Hansson |
| 2009 | DATE | Aelite: A flit-synchronous Network on Chip with composable and predictable services. | Andreas Hansson, Mahesh Subburaman, Kees Goossens |
| 2009 | DSD | Composable Resource Sharing Based on Latency-Rate Servers. | Benny Akesson, Andreas Hansson, Kees Goossens |
| 2007 | DATE | Undisrupted quality-of-service during reconfiguration of multiple applications in networks on chip. | Andreas Hansson, Martijn Coenen, Kees Goossens |
| 2007 | DATE | Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip. | Akash Kumar, Andreas Hansson, Jos Huisken, Henk Corporaal |
| 2006 | DSD | A Monitoring-Aware Network-on-Chip Design Flow. | Calin Ciordas, Andreas Hansson, Kees Goossens, Twan Basten |
| 2006 | IJCNN | Using Segmentation to Control the Retrieval of Data. | Andreas Hansson, Lars Niklasson |