| 2025 | ACSSC | Digital Annealing with Parallel Flip Dynamics. | George Higgins Hutchinson, Tinish Bhattacharya, Arne Heittmann, Dmitri B. Strukov |
| 2025 | ISCAS | Impact of Variability Compensation on the Performance of an RRAM-based 3-SAT Solver. | Arne Heittmann, Mohammad Hizzani, John Paul Strachan |
| 2024 | ISCAS | Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines. | Mohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan |
| 2018 | DATE | Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells. | Arne Heittmann, Tobias G. Noll |
| 2014 | ISCAS | Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit. | Arne Heittmann, Tobias G. Noll |
| 2013 | ASPDAC | Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation. | Arne Heittmann, Tobias G. Noll |
| 2012 | ESANN | A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights. | Arne Heittmann, Tobias G. Noll |
| 2004 | IPAS | Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation. | Jrg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, Ren Schffny |
| 2002 | ICANN | An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. | Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jrg Schreiter, Ren Schffny |