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Atif Yasin

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

6

Active years

2016–2022

Best venue rank

A*

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2022DDECSFunctional Verification of Arithmetic Circuits: Survey of Formal Methods.Maciej J. Ciesielski, Atif Yasin, Jiteshri Dasari
2020DATESPEAR: Hardware-based Implicit Rewriting for Square-root Circuit Verification.Atif Yasin, Tiankai Su, Sbastien Pillement, Maciej J. Ciesielski
2019ASPDACSpectral approach to verifying non-linear arithmetic circuits.Cunxi Yu, Tiankai Su, Atif Yasin, Maciej J. Ciesielski
2018ISCASComputer Algebraic Approach to Verification and Debugging of Galois Field Multipliers.Tiankai Su, Atif Yasin, Cunxi Yu, Maciej J. Ciesielski
2018LPARRewriting Environment for Arithmetic Circuit Verification.Cunxi Yu, Atif Yasin, Tiankai Su, Alan Mishchenko, Maciej J. Ciesielski
2016DACSynergistic timing speculation for multi-threaded programs.Atif Yasin, Jeff Jun Zhang, Hu Chen, Siddharth Garg, Sanghamitra Roy, Koushik Chakraborty