Skip to content

Avadhani Shridhar

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

1

Active years

1996–1996

Best venue rank

A

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
1996ISLPEDStage-skip pipeline: a low power processor architecture using a decoded instruction buffer.Mitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Katsuro Sasaki, Koichi Seki
1996ISLPEDInterlaced accumulation programming for low power DSP.Hirotsugu Kojima, Avadhani Shridhar