Binit Syamal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2026–2026
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | A Low-Power 2-bit Full Adder realized with Three-Independent-Gate Reconfigurable FETs. | Giulio Galderisi, Yuxuan He, Juan P. Martinez, Niladri Bhattacharjee, Binit Syamal, Viktor Havel, Violetta Sessi, Thomas Mikolajick, Jens Trommer |