Bjrnar Hernes
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2001–2004
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | DATE | A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS. | Terje N. Andersen, Atle Briskemyr, Frode Telst, Johnny Bjrnsen, Thomas E. Bonnerud, Bjrnar Hernes, ystein Moldsvor |
| 2001 | ISCAS | A -80 dB HD3 opamp in 3.3 V CMOS technology using tail current compensation. | Bjrnar Hernes, ystein Moldsvor, Trond Sther |