Skip to content

Bo-Hsiang Yang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2018–2018

Best venue rank

Multiconference

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2018ICASSPA 320M Pixel/S Vlsi Architecture Design of Weighted Mode Filter for 4K Ultra-Hd Depth Upsampling.Bo-Hsiang Yang, Li-De Chen, Chao-Tsung Huang