| 2025 | DATE | Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables. | Subhadip Ghosh, Endalk Y. Gebru, Chandramouli V. Kashyap, Ramesh Harjani, Sachin S. Sapatnekar |
| 2021 | DAC | DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks. | Ahmet Faruk Budak, Prateek Bhansali, Bo Liu, Nan Sun, David Z. Pan, Chandramouli V. Kashyap |
| 2020 | DAC | MLParest: Machine Learning based Parasitic Estimation for Custom Circuit Design. | Brett Shook, Prateek Bhansali, Chandramouli V. Kashyap, Chirayu Amin, Siddhartha Joshi |
| 2009 | ICCAD | Quantifying robustness metrics in parameterized static timing analysis. | Khaled R. Heloue, Chandramouli V. Kashyap, Farid N. Najm |
| 2008 | ASPDAC | Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering. | Debasish Das, Kip Killpack, Chandramouli V. Kashyap, Abhijit Jas, Hai Zhou |
| 2008 | DAC | A framework for block-based timing sensitivity analysis. | Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S. Sapatnekar |
| 2008 | DAC | A "true" electrical cell model for timing, noise, and power grid verification. | Noel Menezes, Chandramouli V. Kashyap, Chirayu S. Amin |
| 2008 | ICCAD | Silicon feedback to improve frequency of high-performance microprocessors: an overview. | Chandramouli V. Kashyap, Pouria Bastani, Kip Killpack, Chirayu S. Amin |
| 2007 | DAC | Silicon Speedpath Measurement and Feedback into EDA flows. | Kip Killpack, Chandramouli V. Kashyap, Eli Chiprout |
| 2007 | ICCAD | A nonlinear cell macromodel for digital applications. | Chandramouli V. Kashyap, Chirayu S. Amin, Noel Menezes, Eli Chiprout |
| 2006 | DAC | A multi-port current source model for multiple-input switching effects in CMOS library cells. | Chirayu S. Amin, Chandramouli V. Kashyap, Noel Menezes, Kip Killpack, Eli Chiprout |
| 2005 | DAC | A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis. | Haihua Su, David Widiger, Chandramouli V. Kashyap, Frank Liu, Byron Krauter |
| 2003 | DAC | Delay and slew metrics using the lognormal distribution. | Charles J. Alpert, Frank Liu, Chandramouli V. Kashyap, Anirudh Devgan |
| 2003 | ICCAD | Block-based Static Timing Analysis with Uncertainty. | Anirudh Devgan, Chandramouli V. Kashyap |
| 2003 | ISCAS | Realizable reduction of RLC circuits using node elimination. | Masud H. Chowdhury, Chirayu S. Amin, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter |
| 2002 | ICCAD | A delay metric for RC circuits based on the Weibull distribution. | Frank Liu, Chandramouli V. Kashyap, Charles J. Alpert |
| 2002 | ISCAS | Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance. | Masud H. Chowdhury, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter |
| 2000 | DAC | A realizable driving point model for on-chip interconnect with inductance. | Chandramouli V. Kashyap, Byron Krauter |
| 2000 | ICCAD | An "Effective" Capacitance Based Delay Metric for RC Interconnect. | Chandramouli V. Kashyap, Charles J. Alpert, Anirudh Devgan |