Cheng-Chi Wong
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2010–2010
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | ISCAS | A multiple code-rate turbo decoder based on reciprocal dual trellis architecture. | Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang |