Cheng-Hsiang Chiu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
11
Venues
6
Active years
2021–2026
Best venue rank
A*
Where they publish
Papers
11 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | EuroPar | G-STAR: GPU-Accelerated Statistical Static Timing Analysis Using Level-by-Level Replication. | Boyang Zhang, Chih-Chun Chang, Yi-Hua Chung, Che Chang, Cheng-Hsiang Chiu, Aditya Das Sarma, Tsung-Wei Huang |
| 2026 | ICS | G-PathGen: An Efficient GPU-Parallel k-Critical Path Generation Algorithm. | Che Chang, Yi-Hua Chung, Cheng-Hsiang Chiu, Wan-Luan Lee, Boyang Zhang, Ulf Schlichtmann, Ing-Chao Lin, Xiangyao Yu, Tsung-Wei Huang |
| 2025 | ASPDAC | PathGen: An Efficient Parallel Critical Path Generation Algorithm. | Che Chang, Boyang Zhang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, Tsung-Wei Huang |
| 2025 | ASPDAC | HyperG: Multilevel GPU-Accelerated k-way Hypergraph Partitioner. | Wan-Luan Lee, Dian-Lun Lin, Cheng-Hsiang Chiu, Ulf Schlichtmann, Tsung-Wei Huang |
| 2025 | ASPDAC | iTAP: An Incremental Task Graph Partitioner for Task-parallel Static Timing Analysis. | Boyang Zhang, Che Chang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yang Sui, Chih-Chun Chang, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, Tsung-Wei Huang |
| 2024 | ASPDAC | A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper. | Chedi Morchdi, Cheng-Hsiang Chiu, Yi Zhou, Tsung-Wei Huang |
| 2024 | DAC | G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing Analysis. | Boyang Zhang, Dian-Lun Lin, Che Chang, Cheng-Hsiang Chiu, Bojue Wang, Wan-Luan Lee, Chih-Chun Chang, Donghao Fang, Tsung-Wei Huang |
| 2023 | ICCAD | Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms. | Cheng-Hsiang Chiu, Dian-Lun Lin, Tsung-Wei Huang |
| 2022 | DAC | Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results. | Cheng-Hsiang Chiu, Tsung-Wei Huang |
| 2022 | HPDC | Composing Pipeline Parallelism using Control Taskflow Graph. | Cheng-Hsiang Chiu, Tsung-Wei Huang |
| 2021 | EuroPar | An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads. | Cheng-Hsiang Chiu, Dian-Lun Lin, Tsung-Wei Huang |