| 2020 | ICLR | DDSP: Differentiable Digital Signal Processing. | Jesse H. Engel, Lamtharn Hantrakul, Chenjie Gu, Adam Roberts |
| 2019 | ICML | Graph Matching Networks for Learning the Similarity of Graph Structured Objects. | Yujia Li, Chenjie Gu, Thomas Dullien, Oriol Vinyals, Pushmeet Kohli |
| 2019 | KDD | A Generalized Framework for Population Based Training. | Ang Li, Ola Spyra, Sagi Perel, Valentin Dalibard, Max Jaderberg, Chenjie Gu, David Budden, Tim Harley, Pramod Gupta |
| 2015 | DAC | mTunes: efficient post-silicon tuning of mixed-signal/RF integrated circuits based on Markov decision process. | Manzil Zaheer, Fa Wang, Chenjie Gu, Xin Li |
| 2015 | DATE | Fast eye diagram analysis for high-speed CMOS circuits. | Seyed Nematollah Ahmadyan, Chenjie Gu, Suriyaprakash Natarajan, Eli Chiprout, Shobha Vasudevan |
| 2015 | DATE | Efficient bit error rate estimation for high-speed link by Bayesian model fusion. | Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Xin Li, Chenjie Gu |
| 2014 | DAC | Probabilistic Bug Localization via Statistical Inference based on Partially Observed Data. | Sangho Youn, Chenjie Gu, Jaeha Kim |
| 2014 | ICCAD | A zonotoped macromodeling for reachability verification of eye-diagram in high-speed I/O links with jitter. | Sai Manoj Pudukotai Dinakarrao, Hao Yu, Chenjie Gu, Cheng Zhuo |
| 2014 | ICCAD | MPME-DP: multi-population moment estimation via dirichlet process for efficient validation of analog/mixed-signal circuits. | Manzil Zaheer, Xin Li, Chenjie Gu |
| 2013 | DAC | Efficient moment estimation with extremely small sample size via bayesian inference for analog/mixed-signal validation. | Chenjie Gu, Eli Chiprout, Xin Li |
| 2013 | DAC | Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data. | Fa Wang, Wangyang Zhang, Shupeng Sun, Xin Li, Chenjie Gu |
| 2013 | ICCAD | Bayesian model fusion: a statistical framework for efficient pre-silicon validation and post-silicon tuning of complex analog and mixed-signal circuits. | Xin Li, Fa Wang, Shupeng Sun, Chenjie Gu |
| 2012 | ICASSP | A fully automated technique for constructing FSM abstractions of non-ideal latches in communication systems. | Aadithya V. Karthik, Yingyan Lin, Chenjie Gu, Aolin Xu, Jaijeet S. Roychowdhury, Naresh R. Shanbhag |
| 2012 | ICCAD | Challenges in post-silicon validation of high-speed I/O links. | Chenjie Gu |
| 2012 | ICCAD | Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion. | Xin Li, Wangyang Zhang, Fa Wang, Shupeng Sun, Chenjie Gu |
| 2011 | ASPDAC | FSM model abstraction for analog/mixed-signal circuits by learning from I/O trajectories. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2010 | ASPDAC | Manifold construction and parameterization for nonlinear manifold-based model reduction. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2010 | ICCAD | Phase equations for quasi-periodic oscillators. | Alper Demir, Chenjie Gu, Jaijeet S. Roychowdhury |
| 2010 | ICCAD | Generalized nonlinear timing/phase macromodeling: Theory, numerical methods and applications. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2009 | ICCAD | QLMOR: A new projection-based approach for nonlinear model order reduction. | Chenjie Gu |
| 2008 | ASPDAC | An efficient, fully nonlinear, variability-aware non-monte-carlo yield estimation procedure with applications to SRAM cells and ring oscillators. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2008 | ICCAD | Model reduction via projection onto nonlinear manifolds, with applications to analog circuits and biochemical systems. | Chenjie Gu, Jaijeet S. Roychowdhury |