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Chenyang Lv

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

2023–2025

Best venue rank

A

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2025DATEHaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers.Yiyao Yang, Fu Teng, Pengju Liu, Mengnan Qi, Chenyang Lv, Ji Li, Xuhong Zhang, Zhezhi He
2023ICCDGPT-LS: Generative Pre-Trained Transformer with Offline Reinforcement Learning for Logic Synthesis.Chenyang Lv, Ziling Wei, Weikang Qian, Junjie Ye, Chang Feng, Zhezhi He