Chewnpu Jou
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2010–2014
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | ISCAS | ESD protection design for wideband RF applications in 65-nm CMOS process. | Li-Wei Chu, Chun-Yu Lin, Ming-Dou Ker, Ming-Hsiang Song, Jeng-Chou Tseng, Chewnpu Jou, Ming-Hsien Tsai |
| 2012 | ISCAS | Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology. | Li-Wei Chu, Chun-Yu Lin, Shiang-Yu Tsai, Ming-Dou Ker, Ming-Hsiang Song, Chewnpu Jou, Tse-Hua Lu, Jeng-Chou Tseng, Ming-Hsien Tsai, Tsun-Lai Hsu, Ping-Fang Hung, Tzu-Heng Chang |
| 2010 | ASPDAC | A practice of ESL verification methodology from SystemC to FPGA: using EPC class-1 generation-2 RFID tag design as an example. | W. M. Young, Chua-Huang Huang, Alan P. Su, Chewnpu Jou, Fu-Lung Hsueh |