Chi-Chao Wang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2008–2010
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | ICCAD | Simulation of random telegraph Noise with 2-stage equivalent circuit. | Yun Ye, Chi-Chao Wang, Yu Cao |
| 2010 | ISLPED | Workload-adaptive process tuning strategy for power-efficient multi-core processors. | Jungseob Lee, Chi-Chao Wang, Hamid Reza Ghasemi, Lloyd Bircher, Yu Cao, Nam Sung Kim |
| 2009 | ICCAD | Modeling of layout-dependent stress effect in CMOS design. | Chi-Chao Wang, Wei Zhao, Frank Liu, Min Chen, Yu Cao |
| 2008 | ASPDAC | Design rule optimization of regular layout for leakage reduction in nanoscale design. | Anupama R. Subramaniam, Ritu Singhal, Chi-Chao Wang, Yu Cao |