Chian-Wei Liu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2014–2015
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | ASPDAC | A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays. | Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan |
| 2014 | DATE | Width minimization in the Single-Electron Transistor array synthesis. | Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan |
| 2014 | ICCAD | BDD-based synthesis of reconfigurable single-electron transistor arrays. | Zheng Zhao, Chian-Wei Liu, Chun-Yao Wang, Weikang Qian |