Chien-Chia Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2017–2019
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | DAC | An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis. | Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen |
| 2017 | ASPDAC | Heterogeneous chip power delivery modeling and co-synthesis for practical 3DIC realization. | Wei-Hsun Liao, Chang-Tzu Lin, Sheng-Hsin Fang, Chien-Chia Huang, Hung-Ming Chen, Ding-Ming Kwai, Yung-Fa Chou |