Chien-Chih Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2001–2013
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | DATE | PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design. | Po-Cheng Pan, Hung-Ming Chen, Chien-Chih Lin |
| 2005 | ISCAS | A 15 mW 69 dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications. | Hua-Chin Lee, Chien-Chih Lin, Chia-Hsin Wu, Shen-Iuan Liu, Chorng-Kuang Wang, Hen-Wai Tsao |
| 2001 | ISCAS | A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop. | Ching-Chi Chang, Chien-Chih Lin, Muh-Tian Shiue, Chorng-Kuang Wang |