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Chin-Fu Nien

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

8

Venues

6

Active years

2020–2026

Best venue rank

A*

Where they publish

Papers

8 indexed papers, newest first.

YearVenueTitleAuthors
2026ISLPEDTris-GCN: A 3D NAND Flash-based In-Storage Processing Architecture for GCN Acceleration.Yi-Wa Wu, Jia-You Li, Chi-Jung Chen, Ching (Ryan) Cheng, Chia-Chun Wang, Chin-Fu Nien, Hsiang-Yun Cheng
2025ASPDACReTAP: Processing-in-ReRAM Bitap Approximate String Matching Accelerator for Genomic Analysis.Tsung-Yu Liu, Yen-An Lu, James Yu, Chin-Fu Nien, Hsiang-Yun Cheng
2024DATEReTAP: Processing-in-ReRAM Bitap Approximate String Matching Accelerator for Genomic Analysis.Tsung-Yu Liu, Yen-An Lu, James Yu, Chin-Fu Nien, Hsiang-Yun Cheng
2024ISCAReAIM: A ReRAM-based Adaptive Ising Machine for Solving Combinatorial Optimization Problems.Hao-Wei Chiang, Chin-Fu Nien, Hsiang-Yun Cheng, Kuei-Po Huang
2022DATERePAIR: A ReRAM-based Processing-in-Memory Accelerator for Indel Realignment.Ting Wu, Chin-Fu Nien, Kuang-Chao Chou, Hsiang-Yun Cheng
2021DACRePIM: Joint Exploitation of Activation and Weight Repetitions for In-ReRAM DNN Acceleration.Chen-Yang Tsai, Chin-Fu Nien, Tz-Ching Yu, Hung-Yu Yeh, Hsiang-Yun Cheng
2021ICCDReSpar: Reordering Algorithm for ReRAM-based Sparse Matrix-Vector Multiplication Accelerator.Yi-Jou Hsiao, Chin-Fu Nien, Hsiang-Yun Cheng
2020DATEGraphRSim: A Joint Device-Algorithm Reliability Analysis for ReRAM-based Graph Processing.Chin-Fu Nien, Yi-Jou Hsiao, Hsiang-Yun Cheng, Cheng-Yu Wen, Ya-Cheng Ko, Che-Ching Lin