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Chun Xue

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

16

Venues

8

Active years

2004–2011

Best venue rank

C

Where they publish

Papers

16 indexed papers, newest first.

YearVenueTitleAuthors
2011CATAOptimizing Memory Cost with Loop Transformations.Meilin Liu, Andrew McClain, Chun Xue
2009CATALoop Fusion Technique with Minimal Memory Cost via Retiming.Meilin Liu, Edwin Hsing-Mean Sha, Chun Xue, Meikang Qiu
2009MASSReprogramming with Minimal Transferred Data on Wireless Sensor Network.Jingtong Hu, Chun Xue, Yi He, Edwin Hsing-Mean Sha
2007DATEEnergy minimization with soft real-time and DVS for uniprocessor and multiprocessor embedded systems.Meikang Qiu, Chun Xue, Zili Shao, Edwin Hsing-Mean Sha
2007EUCReal-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System.Guochen Hua, Meng Wang, Zili Shao, Hui Liu, Chun Xue
2007EUCParallel Network Intrusion Detection on Reconfigurable Platforms.Chun Xue, Zili Shao, Meilin Liu, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2007RTCSAReal-Time Loop Scheduling with Leakage Energy Minimization for Embedded VLIW DSP Processors.Meng Wang, Zili Shao, Chun Xue, Edwin Hsing-Mean Sha
2006EUCEfficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network.Mei Kang Qiu, Chun Xue, Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha
2006EUCLoop Striping: Maximize Parallelism for Nested Loops.Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha
2006ICPADSLoop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture.Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha
2005ASPDACHigh-level synthesis for DSP applications using heterogeneous functional units.Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha
2005EUCLoop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs.Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Mei Kang Qiu, Edwin Hsing-Mean Sha
2005EUCOptimizing Nested Loops with Iterational and Instructional Retiming.Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha
2005ICASSPOptimizing DSP scheduling via address assignment with array and loop transformation.Chun Xue, Zili Shao, Ying Chen, Edwin Hsing-Mean Sha
2005ICPADSMinimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems.Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha
2004EUCOptimizing Address Assignment for Scheduling Embedded DSPs.Chun Xue, Zili Shao, Edwin Hsing-Mean Sha, Bin Xiao