Cyril Lahuec
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
9
Venues
2
Active years
2002–2018
Best venue rank
C
Where they publish
Papers
9 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | ISCAS | A fully flexible circuit implementation of clique-based neural networks in 65-nm CMOS. | Benoit Larras, Paul Chollet, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel |
| 2018 | ISCAS | 40 Gop/s/mm | Erwan Libessart, Matthieu Arzel, Cyril Lahuec, Francesco Paolo Andriulli |
| 2017 | ISCAS | A 65-nm CMOS 7fJ per synaptic event clique-based neural network in scalable architecture. | Benoit Larras, Paul Chollet, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel |
| 2015 | IJCNN | Design of analog subthreshold Encoded Neural Network circuit in sub-100nm CMOS. | Benoit Larras, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel |
| 2013 | ISCAS | Analog implementation of encoded neural networks. | Benoit Larras, Cyril Lahuec, Matthieu Arzel, Fabrice Seguin |
| 2009 | ISCAS | Decoding a Family of Dense Codes using the Sum-Product Algorithm. | Jorge Prez Chamorro, Fabrice Seguin, Cyril Lahuec, Michel Jzquel, Gwenalle Le Mestre |
| 2006 | ISCAS | Semi-iterative analog turbo decoding. | Matthieu Arzel, Fabrice Seguin, Cyril Lahuec, Michel Jzquel |
| 2005 | ISCAS | . Analog slice turbo decoding. | Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jzquel |
| 2002 | ISCAS | Programmable video clock synthesizer with sub 0.5 ns drift. | Cyril Lahuec, J. Horan, J. Duigan |