Daniel Sheridan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2001–2004
Best venue rank
B
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | FMCAD | Bounded Verification of Past LTL. | Alessandro Cimatti, Marco Roveri, Daniel Sheridan |
| 2004 | SAT | Clause Form Conversions for Boolean Circuits. | Paul B. Jackson, Daniel Sheridan |
| 2004 | SAT | The Optimality of a Fast CNF Conversion and its Use with SAT. | Daniel Sheridan |
| 2003 | CP | Dynamic Step Size Adjustment in Iterative Deepening Search. | Daniel Sheridan |
| 2002 | FMCAD | A Fixpoint Based Encoding for Bounded Model Checking. | Alan M. Frisch, Daniel Sheridan, Toby Walsh |
| 2001 | CP | Comparing SAT Encodings for Model Checking. | Daniel Sheridan |