Danilo Sijacic
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2018–2020
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | DATE | Sweeping for Leakage in Masked Circuit Layouts. | Danilo Sijacic, Josep Balasch, Ingrid Verbauwhede |
| 2020 | SCN | Generalized Matsui Algorithm 1 with Application for the Full DES. | Tomer Ashur, Raluca Posteuca, Danilo Sijacic, Stef D'haeseleer |
| 2018 | CHES | Towards Efficient and Automated Side Channel Evaluations at Design Time. | Danilo Sijacic, Josep Balasch, Bohan Yang, Santosh Ghosh, Ingrid Verbauwhede |
| 2018 | FDTC | Glitch-Resistant Masking Schemes as Countermeasure Against Fault Sensitivity Analysis. | Victor Arribas, Thomas De Cnudde, Danilo Sijacic |