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Dimitrios Garyfallou

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

3

Active years

2018–2026

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2026DATETowards learning-based gate-level glitch analysis.Anastasis Vagenas, Dimitrios Garyfallou, Georgios I. Stamoulis
2024DACAdvanced gate-level glitch modeling using ANNs.Anastasis Vagenas, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis
2023ASPDACA Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees Using Matrix Exponential.Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis
2021ASPDACExploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models.Chrysostomos Chatzigeorgiou, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis
2018DATEEVT-based worst case delay estimation under process variation.Charalampos Antoniadis, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis