| 2019 | RV | Timescales: A Benchmark Generator for MTL Monitoring Tools. | Dogan Ulus |
| 2019 | RV | Reactive Control Meets Runtime Verification: A Case Study of Navigation. | Dogan Ulus, Calin Belta |
| 2018 | EMSOFT | Embedded software for robotics: challenges and future directions: special session. | Houssam Abbas, Indranil Saha, Yasser Shoukry, Rdiger Ehlers, Georgios Fainekos, Rajesh Gupta, Rupak Majumdar, Dogan Ulus |
| 2018 | TACAS | AMT 2.0: Qualitative and Quantitative Trace Analysis with Extended Signal Temporal Logic. | Dejan Nickovic, Olivier Lebeltel, Oded Maler, Thomas Ferrre, Dogan Ulus |
| 2017 | CAV | Montre: A Tool for Monitoring Timed Regular Expressions. | Dogan Ulus |
| 2017 | FMCAD | First order temporal logic monitoring with BDDs. | Klaus Havelund, Doron Peled, Dogan Ulus |
| 2016 | TACAS | Online Timed Pattern Matching Using Derivatives. | Dogan Ulus, Thomas Ferrre, Eugene Asarin, Oded Maler |
| 2015 | CAV | Measuring with Timed Patterns. | Thomas Ferrre, Oded Maler, Dejan Nickovic, Dogan Ulus |
| 2013 | FDL | Integrating circuit analyses for assertion-based verification of programmable AMS circuits. | Dogan Ulus, Alper Sen, I. Faik Baskaya |