| 2010 | ISCAS | Peak-to-peak jitter reduction technique for the Free-Running Period Synthesizer (FRPS). | Marcel Siadjine Njinowa, Hung Tien Bui, Franois R. Boyer |
| 2007 | ISCAS | A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. | Bill Pontikakis, Hung Tien Bui, Franois R. Boyer, Yvon Savaria |
| 2006 | ISCAS | A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs. | Bill Pontikakis, Franois R. Boyer, Yvon Savaria |
| 2005 | ISCAS | Implementation of a cycle by cycle variable speed processor. | H. G. Epassa, Franois R. Boyer, Yvon Savaria |
| 2004 | DATE | .NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation. | James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, Franois R. Boyer, J. P. David, Guy Bois |
| 2003 | FDL | SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS. | Jrme Chevalier, Mathieu Rondonneau, Olivier Benny, Guy Bois, El Mostapha Aboulhamid, Franois R. Boyer |
| 1998 | ICCD | Optimal design of synchronous circuits using software pipelining techniques. | Franois R. Boyer, El Mostapha Aboulhamid, Yvon Savaria, Imed Eddine Bennour |