Fu-Yi Tsai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2009–2009
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ISCAS | On the Design of Power-rail ESD Clamp Circuit with Consideration of Gate Leakage Current in 65-nm Low-voltage CMOS Process. | Ming-Dou Ker, Po-Yen Chiu, Fu-Yi Tsai, Yeong-Jar Chang |