G. Peter Fang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2005–2013
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | DAC | A new time-stepping method for circuit simulation. | G. Peter Fang |
| 2011 | DAC | Automatic stability checking for large linear analog integrated circuits. | Parijat Mukherjee, G. Peter Fang, Rod Burt, Peng Li |
| 2005 | ASPDAC | Fast, accurate MOS table model for circuit simulation using an unstructured grid and preserving monotonicity. | G. Peter Fang, David C. Yeh, David T. Zweidinger, Lawrence A. Arledge Jr., Vinod Gupta |