Gang-Ryung Uh
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
8
Active years
1997–2015
Best venue rank
A*
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | CASES | Scheduling instruction effects for a statically pipelined processor. | B. Davis, Ryan Baird, Peter Gavin, Magnus Sjlander, Ian Finlayson, F. Rasapour, G. Cook, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson |
| 2007 | CC | Preprocessing Strategy for Effective Modulo Scheduling on Multi-issue Digital Signal Processors. | Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung Paek |
| 2006 | EUC | Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs. | Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung Paek |
| 2004 | RTAS | Tuning the WCET of Embedded Applications. | Wankang Zhao, Prasad A. Kulkarni, David B. Whalley, Christopher A. Healy, Frank Mueller, Gang-Ryung Uh |
| 2003 | EuroPar | Branch Elimination via Multi-variable Condition Merging. | William C. Kreahling, David B. Whalley, Mark W. Bailey, Xin Yuan, Gang-Ryung Uh, Robert van Engelen |
| 2003 | SCOPES | Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer. | Gang-Ryung Uh |
| 2002 | CASES | Experience with a retargetable compiler for a commercial network processor. | Jinhwan Kim, Sungjoon Jung, Yunheung Paek, Gang-Ryung Uh |
| 2000 | CC | Techniques for Effectively Exploiting a Zero Overhead Loop Buffer. | Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanjay Jinturkar, Chris Burns, Vincent Cao |
| 1998 | PLDI | Improving Performance by Branch Reordering. | Minghui Yang, Gang-Ryung Uh, David B. Whalley |
| 1997 | SAS | Coalescing Conditional Branches into Efficient Indirect Jumps. | Gang-Ryung Uh, David B. Whalley |