Gian Marco Bo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
1997–2000
Best venue rank
B
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | IJCNN | An On-Chip Learning Neural Network. | Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle |
| 2000 | IJCNN | A VLSI Architecture for Weight Perturbation on Chip Learning Implementation. | Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Daniele D. Caviglia |
| 2000 | ISCAS | An analog on-chip learning circuit architecture of the weight perturbation algorithm. | Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Ezio Biglieri, Daniele D. Caviglia |
| 2000 | ISCAS | Analog CMOS current mode neural primitives. | Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Enrico Biglieri, Daniele D. Caviglia |
| 1997 | ICANN | A Hardware Implementation of Hierarchical Neural Networks for Real-Time Quality Contol Systems in Industrial Applications. | Daniela Baratta, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle, Giovanni Canepa, Riccardo Parenti, Carla Penno |
| 1997 | ICANN | An Analog VLSI Computational Engine for Early Vision Tasks. | Giacomo M. Bisio, Gian Marco Bo, M. Confalone, Luigi Raffo, Silvio P. Sabatini, M. P. Zizola |