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Guanwen Zhong

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

4

Active years

2014–2017

Best venue rank

A*

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2017DATEDesign Space exploration of FPGA-based accelerators with multi-level parallelism.Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang, Tulika Mitra, Smal Niar
2017PDPA Rapid Data Communication Exploration Tool for Hybrid CPU-FPGA Architectures.Mariem Makni, Smal Niar, Mouna Baklouti, Guanwen Zhong, Tulika Mitra, Mohamed Abid
2016DACLin-analyzer: a high-level performance analysis tool for FPGA-based accelerators.Guanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smal Niar
2014ICCDDesign space exploration of multiple loops on FPGAs using high level synthesis.Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smal Niar