| 2008 | ASPDAC | High performance current-mode differential logic. | Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Cheng, Masanori Hashimoto |
| 2008 | ASPDAC | Timing-power optimization for mixed-radix Ling adders by integer linear programming. | Yi Zhu, Jianhua Liu, Haikun Zhu, Chung-Kuan Cheng |
| 2008 | DAC | Low power passive equalizer optimization using tritonic step response. | Ling Zhang, Wenjian Yu, Haikun Zhu, Alina Deutsch, George A. Katopis, Daniel M. Dreps, Ernest S. Kuh, Chung-Kuan Cheng |
| 2007 | ASPDAC | Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space. | Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng, John Lillis |
| 2007 | ASPDAC | Approaching Speed-of-light Distortionless Communication for On-chip Interconnect. | Haikun Zhu, Rui Shi, Chung-Kuan Cheng, Hongyu Chen |
| 2007 | ASPDAC | An Interconnect-Centric Approach to Cyclic Shifter Design Using Fanout Splitting and Cell Order Optimization. | Haikun Zhu, Yi Zhu, Chung-Kuan Cheng, David M. Harris |
| 2007 | ICCD | Passive compensation for high performance inter-chip communication. | Chun-Chen Liu, Haikun Zhu, Chung-Kuan Cheng |
| 2005 | ASPDAC | Constructing zero-deficiency parallel prefix adder of minimum depth. | Haikun Zhu, Chung-Kuan Cheng, Ronald L. Graham |
| 2003 | ICCAD | An Algorithmic Approach for Generic Parallel Adders. | Jianhua Liu, Shuo Zhou, Haikun Zhu, Chung-Kuan Cheng |