Skip to content

Hans M. Jacobson

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

15

Venues

8

Active years

1996–2023

Best venue rank

A*

Where they publish

Papers

15 indexed papers, newest first.

YearVenueTitleAuthors
2023DSNCharacterization and Exploration of Latch Checkers for Efficient RAS Protection.Karthik Swaminathan, Ramon Bertran, Doug Balazich, Alper Buyuktosunoglu, Arvind Haran, Sean M. Carey, Karl Anderson, Hans M. Jacobson, Matthias Pflanz, Pradip Bose
2021DSNSERMiner : A Framework for Early-stage Reliability Estimation for IBM Processors.Karthik Swaminathan, Ramon Bertran, Hans M. Jacobson, Pradip Bose, Matthias Pflanz, Doug Balazich
2021ISCAEnergy Efficiency Boost in the AI-Infused POWER10 Processor.Brian W. Thompto, Dung Q. Nguyen, Jos E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Mller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose
2019DSNGeneration of Stressmarks for Early Stage Soft-Error Modeling.Karthik Swaminathan, Ramon Bertran, Hans M. Jacobson, Prabhakar Kudva, Pradip Bose
2017ICCDVery Low Voltage (VLV) Design.Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel J. Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler
2015HPCAQuantifying sources of error in McPAT and potential impacts on architectural studies.Sam Likun Xi, Hans M. Jacobson, Pradip Bose, Gu-Yeon Wei, David M. Brooks
2014ISLPEDEmpirically derived abstractions in uncore power modeling for a server-class processor chip.Hans M. Jacobson, Arun Joseph, Dharmesh Parikh, Pradip Bose, Alper Buyuktosunoglu
2012DATEPower management of multi-core chips: Challenges and pitfalls.Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger
2011HPCAAbstraction and microarchitecture scaling in early-stage power modeling.Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer
2005HPCAStretching the Limits of Clock-Gating Efficiency in Server-Class Processors.Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Richard J. Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, Joel M. Tendler
2004ISLPEDMicroarchitectural techniques for power gating of execution units.Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose
2004ISLPEDImproved clock-gating through transparent pipelining.Hans M. Jacobson
2000ICCADAchieving Fast and Exact Hazard-Free Logic Minimization of Extended Burst-Mode gC Finite State Machines.Hans M. Jacobson, Chris J. Myers, Ganesh Gopalakrishnan
1996DACA Technique for Synthesizing Distributed Burst-mode Circuits.Prabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson
1996DACSynthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes.Prabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson, Steven M. Nowick