Hasitha Muthumala Waidyasooriya
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2012–2025
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ASPDAC | Large-Scale AGV Routing Based on Multi-FPGA SQA Acceleration. | Thinh NguyenQuang, Kosuke Matsuyama, Keisuke Shimizu, Hiroki Sugano, Eiji Kurimoto, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Masayuki Ohzeki |
| 2022 | PDCAT | Word2Vec FPGA Accelerator Based on Spatial and Temporal Parallelism. | Hasitha Muthumala Waidyasooriya, Shutaro Ishihara, Masanori Hariyama |
| 2019 | ISCAS | FPGA-Based Acceleration of Word2vec using OpenCL. | Taisuke Ono, Tomoki Shoji, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yuichiro Aoki, Yuki Kondoh, Yaoko Nakagawa |
| 2017 | SNPD | Architecture of an FPGA accelerator for LDA-based inference. | Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Tsukasa Ishigaki |
| 2012 | ISCAS | FPGA implementation of heterogeneous multicore platform with SIMD/MIMD custom accelerators. | Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama |