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Herv Fanet

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

2

Active years

2013–2026

Best venue rank

C

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASModeling of an All-Mechanical In-Sensor Vibration Classifier Compatible with MEMS Implementation.Aleksandra Markovic, Armine Karami, Herv Fanet, Dimitri Galayko, Bernard Legrand, Philippe Basset, Gal Pillonnet
2017ISCASAdiabatic capacitive logic: A paradigm for low-power logic.Gal Pillonnet, Herv Fanet, Samer Houri
2017RCCapacitive-Based Adiabatic Logic.Ayrat Galisultanov, Yann Perrin, Herv Fanet, Gal Pillonnet
2015RCPower-Clock Generator Impact on the Performance of NEM-Based Quasi-Adiabatic Logic Circuits.Samer Houri, Grard Billiot, Marc Belleville, Alexandre Valentian, Herv Fanet
2013RCComparing CMOS-Based and NEMS-Based Adiabatic Logic Circuits.Samer Houri, Alexandre Valentian, Herv Fanet