Hikaru Takayashiki
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2019–2024
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | SC | Performance Analysis of the NICAM Benchmark on MN-Core Processor. | Hikaru Takayashiki, Natsuko Saito, Hiroto Imachi, Ryo Sakamoto, Junichiro Makino |
| 2023 | SC | A New Sparse GEneral Matrix-matrix Multiplication Method for Long Vector Architecture by Hierarchical Row Merging. | Hikaru Takayashiki, Hotaka Yagi, Hiroki Nishimoto, Naoki Yoshifuji |
| 2021 | SBAC-PAD | Register Flush-free Runahead Execution for Modern Vector Processors. | Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi |
| 2019 | SC | A Hardware Prefetching Mechanism for Vector Gather Instructions. | Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi |