Himanshu Ranjan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2025–2025
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | A 1.91 POPS/W Energy-Efficient SRAM Based Signed Multi-Bit Time Domain CIM Architecture. | Subhradip Chakraborty, Dinesh Kushwaha, Himanshu Ranjan, Sudeb Dasgupta |