| 2025 | HPCC | X-SA: An Efficient Configurable Systolic Array Computing Architecture for GPGPU. | Yingsong Wang, Zhenzhen Jia, Ling Yang, Hongbing Tan, Junsheng Chang, Junbo Tie, Libo Huang |
| 2025 | ICCD | PolyPE: An Efficient Multi-Precision Multi-Mode Floating-Point Processing Element for HPC and AI. | Zhenzhen Jia, Hongbing Tan, Ling Yang, Hui Guo, Kun Zeng, Junsheng Chang, Yongwen Wang, Libo Huang |
| 2024 | EuroPar | ImSPU: Implicit Sharing of Computation Resources Between Vector and Scalar Processing Units. | Hongbing Tan, Xiaowei He, Guichu Sun, Liquan Xiao, Yuanhu Cheng, Jing Zhang, Zhong Zheng, Quan Deng, Bingcai Sui, Yongwen Wang, Libo Huang |
| 2023 | EuroPar | A Multi-level Parallel Integer/Floating-Point Arithmetic Architecture for Deep Learning Instructions. | Hongbing Tan, Jing Zhang, Libo Huang, Xiaowei He, Dezun Dong, Yongwen Wang, Liquan Xiao |
| 2023 | ICCD | SFDoP: A Scalable Fused BFloat16 Dot-Product Architecture for DNN. | Jing Zhang, Hongbing Tan, Libo Huang |
| 2022 | ICA3PP | Efficient Multiple-Precision and Mixed-Precision Floating-Point Fused Multiply-Accumulate Unit for HPC and AI Applications. | Hongbing Tan, Run Yan, Ling Yang, Libo Huang, Liquan Xiao, Qianming Yang |