Hsiao-Pin Su
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1998–1999
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | DAC | A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning. | Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin |
| 1998 | ICCAD | Integrating logic retiming and register placement. | Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin |