Hsiu-Cheng Chang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
2
Active years
2005–2012
Best venue rank
C
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ISCAS | A two level mode decision algorithm for H.264 high profile intra encoding. | Cheng-Yen Chang, Cheng-An Chien, Hsiu-Cheng Chang, Jia-Wei Chen, Jiun-In Guo |
| 2011 | ASPDAC | A H.264/MPEG-2 dual mode video decoder chip supporting temporal/spatial scalable video. | Cheng-An Chien, Yao-Chang Yang, Hsiu-Cheng Chang, Jia-Wei Chen, Cheng-Yen Chang, Jiun-In Guo, Jinn-Shyan Wang, Ching-Hwa Cheng |
| 2009 | ASPDAC | A dynamic quality-scalable H.264 video encoder chip. | Hsiu-Cheng Chang, Yao-Chang Yang, Jia-Wei Chen, Ching-Lung Su, Cheng-An Chien, Jiun-In Guo, Jinn-Shyan Wang |
| 2009 | ISCAS | A Dynamic Quality-scalable H.264 Video Encoder. | Hsiu-Cheng Chang, Jia-Wei Chen, Yao-Chang Yang, Cheng-An Chien, Tzu-Chun Chang, Jinn-Shyan Wang, Jiun-In Guo |
| 2009 | ISCAS | A High Throughput Deblocking Filter Design Supporting Multiple Video Coding Standards. | Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo |
| 2005 | ISCAS | A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding. | Hsiu-Cheng Chang, Chien-Chang Lin, Jiun-In Guo |