Hua-Hsin Yeh
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2012–2014
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | DATE | Leakage-power-aware clock period minimization. | Hua-Hsin Yeh, Shih-Hsu Huang, Yow-Tyng Nieh |
| 2012 | ISCAS | A formal approach to slack-driven high-level synthesis. | Hua-Hsin Yeh, Shih-Hsu Huang, Chun-Hua Cheng |