Huaqiang Wu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2014–2025
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | MTVSM-CIM: A Magnified-TMR VC-SOT-MRAM Computing-in-Memory Macro for Edge AI. | Bingqian Song, Cancheng Xiao, Fantao Gao, Jiahao Zhao, Mengzhu Li, Ziwei Han, Jianshi Tang, Huaqiang Wu, Tianxiang Nan |
| 2024 | ISCAS | HXNOR-PBNN: A Scalable and Parallel Spintronics Synaptic Architecture for Probabilistic Binary Neural Networks. | Cancheng Xiao, Yuxuan Ma, Dingsong Jiang, Jianle Liu, Bingqian Song, Jianshi Tang, Huaqiang Wu, Tianxiang Nan |
| 2022 | ICPR | Improving the accuracy of neural networks in analog computing-in-memory systems by analog weight. | Lingjun Dai, Qingtian Zhang, Huaqiang Wu |
| 2021 | DATE | An On-chip Layer-wise Training Method for RRAM based Computing-in-memory Chips. | Yiwen Geng, Bin Gao, Qingtian Zhang, Wenqiang Zhang, Peng Yao, Yue Xi, Yudeng Lin, Junren Chen, Jianshi Tang, Huaqiang Wu, He Qian |
| 2019 | DAC | Design Guidelines of RRAM based Neural-Processing-Unit: A Joint Device-Circuit-Algorithm Analysis. | Wenqiang Zhang, Xiaochen Peng, Huaqiang Wu, Bin Gao, Hu He, Youhui Zhang, Shimeng Yu, He Qian |
| 2014 | ISCAS | Stack engineering for ReRAM devices performance improvement. | Huaqiang Wu, Xinyi Li, Yue Bai, Ye Zhang, Minghao Wu, Zhiping Yu, He Qian |