| 2026 | ISCAS | Automatic Circuit Topology Generation on a Reconfigurable Analog Array. | Ziyi Chen, Ioannis Savidis |
| 2025 | DATE | TARN: Trust Aware Routing to Enhance Security in 3D Network-on-Chips. | Hasin Ishraq Reefat, Alec Aversa, Ioannis Savidis, Naghmeh Karimi |
| 2025 | ICCD | Representation Learning for Digital Integrated Circuit Design Automation. | Pratik Shrestha, Ioannis Savidis |
| 2025 | ISCAS | Differentiable Graph Neural Networks for Wirelength Estimation. | Zhengfeng Wu, Pratik Shrestha, Saran Phatharodom, Ioannis Savidis |
| 2024 | ISCAS | Block Configuration Algorithms for a Reconfigurable Analog Array. | Ziyi Chen, Ioannis Savidis |
| 2024 | ISCAS | DNA: DC Nodal Analysis Attack for Analog Circuits. | Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis |
| 2024 | ISCAS | Edge-weighted Graph Neural Networks for Post-placement Interconnect Capacitance Estimation of Analog Circuits. | Zhengfeng Wu, Ioannis Savidis |
| 2023 | ISCAS | A Power Side-Channel Attack on Flash ADC. | Ziyi Chen, Ioannis Savidis |
| 2023 | ISCAS | Graph Representation Learning for Parasitic Impedance Prediction of the Interconnect. | Pratik Shrestha, Ioannis Savidis |
| 2023 | ISCAS | Circuit-GNN: A Graph Neural Network for Transistor-level Modeling of Analog Circuit Hierarchies. | Zhengfeng Wu, Ioannis Savidis |
| 2022 | ISCAS | Reconfigurable Analog Array for Hardware Security. | Ziyi Chen, Ioannis Savidis |
| 2022 | ISCAS | Synthesis of Coupling Capacitance Based Hidden State Transitions for Sequential Logic Locking. | Pratik Shrestha, Ioannis Savidis |
| 2022 | ISCAS | Transfer Learning for Reuse of Analog Circuit Sizing Models Across Technology Nodes. | Zhengfeng Wu, Ioannis Savidis |
| 2021 | ICCD | Reconfigurable Array for Analog Applications. | Ziyi Chen, Ioannis Savidis |
| 2020 | ISCAS | Reducing Logic Locking Key Leakage through the Scan Chain. | Kyle Juretus, Ioannis Savidis |
| 2020 | ISCAS | Modeling SAT-Attack Search Complexity. | Saran Phatharodom, Nagarajan Kandasamy, Ioannis Savidis |
| 2020 | ISCAS | Security Vulnerabilities of Obfuscated Analog Circuits. | Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis |
| 2020 | ISLPED | Dynamic idle core management and leakage current reuse in MPSoC platforms. | Md Shazzad Hossain, Ioannis Savidis |
| 2019 | ICCD | Applying Swarm Intelligence to Distributed On-Chip Power Management. | Divya Pathak, Ioannis Savidis |
| 2019 | ISCAS | Reusing Leakage Current for Improved Energy Efficiency of Multi-Voltage Systems. | Md Shazzad Hossain, Ioannis Savidis |
| 2019 | ISCAS | Increasing the SAT Attack Resiliency of In-Cone Logic Locking. | Kyle Juretus, Ioannis Savidis |
| 2019 | ISCAS | Mesh Based Obfuscation of Analog Circuit Properties. | Vaibhav Venugopal Rao, Ioannis Savidis |
| 2019 | ISLPED | Robust Low Power Clock Synchronization for Multi-Die Systems. | Ragh Kuttappa, Baris Taskin, Scott Lerner, Vasil Pano, Ioannis Savidis |
| 2018 | ASPDAC | Power conversion efficiency-aware mapping of multithreaded applications on heterogeneous architectures: A comprehensive parameter tuning. | Hossein Sayadi, Divya Pathak, Ioannis Savidis, Houman Homayoun |
| 2018 | ICCD | Machine Learning on the Thermal Side-Channel: Analysis of Accelerator-Rich Architectures. | David Werner, Kyle Juretus, Ioannis Savidis, Mark Hempstead |
| 2018 | ISCAS | Noise Constrained Optimum Selection of Supply Voltage for IoT Applications. | Md Shazzad Hossain, Ioannis Savidis |
| 2018 | ISCAS | Time Domain Sequential Locking for Increased Security. | Kyle Juretus, Ioannis Savidis |
| 2016 | ISCAS | Robust near-threshold inverter with improved performance for ultra-low power applications. | Md Shazzad Hossain, Ioannis Savidis |
| 2016 | ISCAS | Reducing logic encryption overhead through gate level key insertion. | Kyle Juretus, Ioannis Savidis |
| 2016 | ISCAS | Energy efficient on-chip power delivery with run-time voltage regulator clustering. | Divya Pathak, Mohammad Hossein Hajkazemi, Mohammad Khavari Tavana, Houman Homayoun, Ioannis Savidis |
| 2015 | DAC | ElasticCore: enabling dynamic heterogeneity with joint core and voltage/frequency scaling. | Mohammad Khavari Tavana, Mohammad Hossein Hajkazemi, Divya Pathak, Ioannis Savidis, Houman Homayoun |
| 2015 | ICCD | Realizing complexity-effective on-chip power delivery for many-core platforms by exploiting optimized mapping. | Mohammad Khavari Tavana, Divya Pathak, Mohammad Hossein Hajkazemi, Maria Malik, Ioannis Savidis, Houman Homayoun |
| 2014 | ISCAS | Thermal conduction path analysis in 3-D ICs. | Boris Vaisband, Ioannis Savidis, Eby G. Friedman |
| 2011 | ISCAS | Clock distribution models of 3-D integrated systems. | Ioannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman |
| 2010 | ISCA | An intra-chip free-space optical interconnect. | Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Rebecca Berman, Peng Liu, Michael C. Huang, Hui Wu, Eby G. Friedman, Gary Wicks, Duncan Moore |
| 2008 | ISCAS | Electrical modeling and characterization of 3-D vias. | Ioannis Savidis, Eby G. Friedman |