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Ippei Tate

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

1

Active years

2006–2007

Best venue rank

National

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2007PDPTAToward Parallel and Distributed Processing on High-Density Network with Mobile Devices.Satoshi Watanabe, Yoshiyasu Ogasawara, Ippei Tate, Hirofumi Yano, Hironori Nakajo
2006PDPTATowards Reconfigurable Cache Memory for a Multithreaded Processor.Yoshiyasu Ogasawara, Ippei Tate, Satoshi Watanabe, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Mitaro Namiki, Hironori Nakajo
2006PDPTAA Model of Implementable SMT Processor on FPGA.Ippei Tate, Yoshiyasu Ogasawara, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Satoshi Watanabe, Mitaro Namiki, Hironori Nakajo