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Jacqueline Chame

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

6

Active years

1993–2010

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2010ICSSpeeding up Nek5000 with autotuning and specialization.Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun Chen, Paul F. Fischer, Paul D. Hovland
2009HPDCModel-guided autotuning of high-productivity languages for petascale computing.Hans P. Zima, Mary W. Hall, Chun Chen, Jacqueline Chame
2006DaMoNProcessing-in-memory technology for knowledge discovery algorithms.Jafar Adibi, Tim Barrett, Spundun Bhatt, Hans Chalupsky, Jacqueline Chame, Mary W. Hall
2005CGOCombining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy.Chun Chen, Jacqueline Chame, Mary W. Hall
2005CGOSuperword-Level Parallelism in the Presence of Control Flow.Jaewook Shin, Mary W. Hall, Jacqueline Chame
2002ICSThe architecture of the DIVA processing-in-memory chip.Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan
1999ICSA tile selection algorithm for data locality and cache interference.Jacqueline Chame, Sungdo Moon
1999SCMapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture.Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, Joonseok Park
1993SIGMETRICSCache Inclusion and Processor Sampling in Multiprocessor Simulations.Jacqueline Chame, Michel Dubois